Quantinuum said it has achieved a logical fidelity of 99.9995% on its Helios commercial computer using the company’s error-correction architecture.
This marks Quantinuum’s second breakthrough in two months, demonstrating how its trapped-ion hardware and flexible architecture work together to deliver rapid improvements in accuracy.
The company said the latest achievement validates that its accuracy performance is now within the target range for Apollo, the Quantinuum’s planned universal fault-tolerant quantum computer expected to be available by 2029.
Quantinuum’s architecture is an end-to-end framework programmable through the company’s developer platform. It integrates tailored AI decoders, all-to-all qubit connectivity, high-fidelity physical operations, and hardware-level error correction.
This architecture also allows the company to test, refine, and combine different error-correction codes and optimize between accuracy and efficiency.
In the latest study, Quantinuum used a well-known “color code” within this architecture to achieve the world-record logical fidelity result, which is equivalent to just five errors per million operations.
The error rate is 10 times lower than Quantinuum’s own world record achieved last month and 100 times lower than the best published result across all other hardware modalities, which was reported by Google Quantum AI on a superconducting system.
“With this result, we’ve proven that we have the error-correction architecture and trapped-ion technology required to achieve universal fault-tolerance,” said Rajeeb Hazra, CEO of Quantinuum.
“We have reduced error rates tenfold in rapid succession using a different code on the same commercial hardware, demonstrating the flexibility of our error-correction architecture,” said Hazra. “We’ve crossed the threshold necessary for exponential improvements in accuracy, reinforcing our path to Apollo and how we can help users unlock commercial value from quantum at scale.”
The study also showed that logical errors fell exponentially as Quantinuum increased the “code distance,” a technique used to understand how many physical qubits are needed to protect quantum information as the error correction scales.
Each tested increase reduced the remaining logical errors by a record factor of 12, demonstrating increasingly effective error suppression as the code grows—a critical capability for scaling fault-tolerant quantum computing.
Quantinuum believes this result suggests it can deliver fault-tolerance with significantly fewer qubits than are required for other modalities.
“This is a significant milestone that quantum computing researchers have been working toward for many years,” said Robin Blume-Kohout, co-director of Sandia National Laboratories’ Quantum Performance Lab, who was not involved in the study.
“The paper demonstrates real, serious performance gains from quantum error correction—a logical qubit nearly 100x better than its component physical qubits,” said Blume-Kohout. “A scaled-up version of this system could reach the reliability required for useful fault-tolerant computation at a feasible size—less than a million physical qubits—which improves the outlook for practical quantum computing. These findings go a long way to retire one of the field’s central technical risks.”
In September 2026, Quantinuum used the same error-correction architecture with its Helix code to demonstrate record-setting logical memory and computation. Both studies ran on the same Helios hardware.
The two demonstrations illustrate how Quantinuum can rapidly prototype different error-correction codes within the same architecture to optimize for relative strengths in accuracy, efficiency, and speed.
On Helios, Helix used 10 physical qubits per logical qubit, compared with up to 37 for the color code, while the color code delivered lower logical error rates. This provides insight into which applications pair best with each code as systems advance toward fault-tolerance.
Quantinuum’s error-correction architecture is flexible, allowing for adaptive syndrome extraction, which adjusts error-checking measurements during computation, and chain-mapping, which connects codes suited to different computational tasks. Together with efficient code structures and real-time decoding, these techniques provide multiple ways to reduce errors and resource requirements.
